/*
 * Renesas SCP/MCP Software
 * Copyright (c) 2020-2021, Renesas Electronics Corporation. All rights
 * reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#ifndef CLOCK_SD_DEVICES_H
#define CLOCK_SD_DEVICES_H

/*!
 * \brief Clock device indexes.
 */
enum clock_sd_parent_idx {
    CLK_EXTAL,
    CLK_OSC_EXTAL,
    CLK_PLL1,
    CLK_PLL1_DIV2,
    CLK_PLL1_DIV4,
    CLK_S0,
    CLK_S1,
    CLK_S2,
    CLK_S3,
    CLK_SDSRC,
    CLOCK_PARENT_IDX_COUNT
};

enum clock_sd_dev_idx {
    CLOCK_SD_DEV_IDX_ZTR,
    CLOCK_SD_DEV_IDX_ZTRD2,
    CLOCK_SD_DEV_IDX_ZT,
    CLOCK_SD_DEV_IDX_ZX,
    CLOCK_SD_DEV_IDX_S0D1,
    CLOCK_SD_DEV_IDX_S0D2,
    CLOCK_SD_DEV_IDX_S0D3,
    CLOCK_SD_DEV_IDX_S0D4,
    CLOCK_SD_DEV_IDX_S0D6,
    CLOCK_SD_DEV_IDX_S0D8,
    CLOCK_SD_DEV_IDX_S0D12,
    CLOCK_SD_DEV_IDX_S1D1,
    CLOCK_SD_DEV_IDX_S1D2,
    CLOCK_SD_DEV_IDX_S1D4,
    CLOCK_SD_DEV_IDX_S2D1,
    CLOCK_SD_DEV_IDX_S2D2,
    CLOCK_SD_DEV_IDX_S2D4,
    CLOCK_SD_DEV_IDX_S3D1,
    CLOCK_SD_DEV_IDX_S3D2,
    CLOCK_SD_DEV_IDX_S3D4,
    CLOCK_SD_DEV_IDX_SD0,
    CLOCK_SD_DEV_IDX_SD1,
    CLOCK_SD_DEV_IDX_SD2,
    CLOCK_SD_DEV_IDX_SD3,
    CLOCK_SD_DEV_IDX_CL,
    CLOCK_SD_DEV_IDX_CR,
    CLOCK_SD_DEV_IDX_CP,
    CLOCK_SD_DEV_IDX_CPEX,
    CLOCK_SD_DEV_IDX_CANFD,
    CLOCK_SD_DEV_IDX_CSI0,
    CLOCK_SD_DEV_IDX_MSO,
    CLOCK_SD_DEV_IDX_HDMI,
    CLOCK_SD_DEV_IDX_OSC,
    CLOCK_SD_DEV_IDX_R,
    CLOCK_SD_DEV_IDX_S0,
    CLOCK_SD_DEV_IDX_S1,
    CLOCK_SD_DEV_IDX_S2,
    CLOCK_SD_DEV_IDX_S3,
    CLOCK_SD_DEV_IDX_SDSRC,
    CLOCK_SD_DEV_IDX_RINT,
    CLOCK_SD_DEV_IDX_COUNT
};

#define CLK_ID_SD_START CLOCK_SD_DEV_IDX_ZTR
#define CLK_ID_SD_END CLOCK_SD_DEV_IDX_COUNT

#endif /* CLOCK_SD_DEVICES_H */
